Protel 99se absolute origin reset how to#

However listing broken subnets when actually there is some clearance error or a short, has always been a feature of Protel PCB. The DRC errors are listed as broken subnets, but clearly they are physically connected within each piece of the plane. Usually, by clicking on some random track, the DRC error goes away, but I have spent a few days on this and can't solve it. There are cases where one has to just give up and accept some DRC errors but I don't like doing it. I wondered if one is supposed to use a Polygon Plane? I tried that and it doesn't seem to make any difference. The way to generate split planes is to place a track on the plane layer. I have carefully checked that the tracks placed on the Plane 1 layer have no breaks in them, since that would be an obvious cause. But Protel is in some cases joining them up - as if the planes were joined. I have this PCB with a split ground plane (Internal Plane 1): Placing pads in each these four areas, with all the pads having a 'relief to Plane 1' should not produce a conflict.

Protel 99se absolute origin reset how to#

But now I have a weird problem and wonder if somebody of sufficient age might remember how to deal with it. I am also more than familiar with its cryptic and mostly useless DRC errors, which in most cases are solved by trial and error only the. It works great and I have done many many designs with it. I am running this old prog under a winXP VM.